Transcend TS64MSD64V3F Datový list stáhnout pdf (Strana 7)

200PIN DDR333 Unbuffered SO-DIMM

512MB With 32Mx8 CL2.5

AC OPERATING CONDITIONS

Parameter Symbol Min Max

Unit Note

Input High (Logic 1) Voltage, DQ, DQS and DM signals VIH(AC) VREF + 0.35 V 3

Input Low (Logic 0) Voltage, DQ, DQS and DM signals VIL(AC) VREF - 0.35 V 3

Input Differential Voltage, CK and /CK inputs VID(AC) 0.7 VDDQ + 0.6 V 1

Input Crossing Point Voltage, CK and /CK inputs VIX(AC) 0.5*VDDQ - 0.2 0.5*VDDQ + 0.2 V 2

Note: 1. VIH(max)=4.2V. The overshoot voltage duration is <=3ns at VDD.

2. VIL(min)=-1.5V. The undershoot voltage duration is <=3ns at VSS

3. VID is the magnitude of the difference between the input level on CK and the input on /CK

4. The Value of VIX is expected to equal 0.5*VDDQ of the transmitting device and must track variations in the

DC level of the same.

AC OPERATING TEST CONDITIONS (VDD=2.5, VDDQ=2.5, TA=0 to 70°C)

Parameter Value Unit Note

Input reference voltage for Clock 0.5*VDDQ V

Input signal maximum peak swing 1.5 V

Input Levels (VIH/VIL) VREF+0.31/VREF-0.31 V

Input timing measurement reference level VREF V

Output timing measurement reference level VTT V

Output load condition See Load Circuit

ZO=50ohm

VTT=0.5*VDDQ

RT=50ohm

LOAD

=30pF

Output

Output Load circuit

VREF

=0.5*VDDQ

Input/Output CAPACITANCE (VDD = 2.5V, VDDQ = 2.5V,TA = 25°C, f = 1MHz)

Parameter Symbol Min Max Unit

Input capacitance (A0~A12, BA0~BA1, /RAS, /CAS, /WE)

Input capacitance (CKE0,CKE1)

Input capacitance (/CS0,/CS1)

Input capacitance (CK0, CK1)

Input capacitance (DM0~DM7)

Data and DQS input/output capacitance (DQ0~DQ63)

IN1

CIN2

IN3

IN4

CIN5

OUT1

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